
190
7810C–AVR–10/12
Atmel ATmega328P [Preliminary]
Note:
operation
Bits 5:4 – UPMn1:0: Parity Mode
These bits enable and set type of parity generation and check. If enabled, the Transmitter will
automatically generate and send the parity of the transmitted data bits within each frame. The
Receiver will generate a parity value for the incoming data and compare it to the UPMn setting.
If a mismatch is detected, the UPEn Flag in UCSRnA will be set.
Bit 3 – USBSn: Stop Bit Select
This bit selects the number of stop bits to be inserted by the Transmitter. The Receiver ignores
this setting.
Bit 2:1 – UCSZn1:0: Character Size
The UCSZn1:0 bits combined with the UCSZn2 bit in UCSRnB sets the number of data bits
(Character SiZe) in a frame the Receiver and Transmitter use.
Table 19-4.
UMSELn Bits Settings
UMSELn1
UMSELn0
Mode
0
Asynchronous USART
0
1
Synchronous USART
1
0
(Reserved)
1
Table 19-5.
UPMn Bits Settings
UPMn1
UPMn0
Parity Mode
0
Disabled
01
Reserved
1
0
Enabled, Even Parity
1
Enabled, Odd Parity
Table 19-6.
USBS Bit Settings
USBSn
Stop Bit(s)
01-bit
12-bit